For decades, chipmakers have shrunk circuits smaller and smaller. The problem is conventional silicon circuitry is expected to reach a physical limit of about 10 nanometers or billionths of a meter in the next 15 years or so, the San Jose, Calif.-headquartered Semiconductor Industry Alliance has noted. Scientists are experimenting with carbon nanotubes as future alternatives, which are already roughly one or two nanometers wide. The problem is that it currently requires time-consuming labor to maneuver these nanotubes into place.
Instead, electrical engineer Chongwu Zhou at University of Southern California in Los Angeles and his team investigated if the surfaces nanotubes are grown on could automatically guide them. He and his colleagues found that sapphire could orient nanotubes into arrays. Sapphire crystals are much like hexagonal towers in shape, and most vertical cuts of sapphire presents its aluminum and oxygen atoms in arrangements that promote aligned growth.
Zhou and his colleagues then created transistors using these arrays. Once the researchers grow aligned nanotubes on top of sapphire, the researchers fabricate metal electrodes of transistors where they wish and eliminate superfluous nanotubes using oxygen plasma. The scientists report their findings in the journal Nano Letters.
In the past, carbon nanotube transistors usually were built on top of silicon composites widespread in the electronics industry. The problem was that when combined, the electrically conductive metal electrodes and the semiconducting silicon behaved like a capacitor, a device that stores electrical charge. This new method gets rid of this parasitic drain, which increases power consumption and slows performance, because sapphire is not semiconducting like silicon, but an electrical insulator.
By cooking a plastic onto transistors in an oven and peeling them off, Zhou and his team could easily develop flexible electronics. Such flexible electronics could find use in large flat panel displays, Zhou said.
"Overall, he is in the right track trying to solve a scientific question that has practical ramification," stated Ali Keshavarzi, a research scientist at Intel's circuit research labs in Hillsboro, Ore. In terms of future directions Zhou and his colleagues should take, "he has packed about 40 tubes per one micron of width and we should reach hundreds. He should also worry about carbon nanotube diameter control to make sure these arrays of tubes have rather uniform diameters," Keshavarzi added.
Charles Choi covers research and technology for UPI. E-mail: firstname.lastname@example.org
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