Nanowriter development progresses

Jan. 10, 2011 at 11:58 AM

ARLINGTON, Va., Jan. 10 (UPI) -- A new method for fabrication of application-specific integrated circuits is moving closer under a program by the U.S. Defense Advanced Research Projects Agency.

DARPA said its Maskless Nanowriter program is developing a massively parallel, direct-write, electron-beam lithography tool with a write speed more than 100 times faster than current single-column eBeam tools.

If successful, the program will eliminate the need for expensive mask sets and will increase economic viability of small-lot production for custom, ASICs and micro-electromechanical systems.

The new Nanowriter tool is targeted at the 45-nm lithography node with technology scalable to 32 nm and beyond, the agency said.

DARPA said the program recently achieved two important milestones when it demonstrated a micro-lens array to pattern a beam into 1 million electron beamlets and showed a second-generation eBeam column designed to significantly reduce pattern blur.

Lithography is currently performed by inserting a complex mask between a deep, ultraviolet light source and a silicon wafer, projecting a circuit pattern onto the wafer. High throughput in direct-write lithography is difficult to achieve since each feature is written serially as opposed to conventional lithography, in which millions of features are written in parallel. In this new high-throughput maskless tool, high throughput is achieved through the simultaneous deployment of 1 million parallel electron beamlets.

"As feature sizes on integrated circuits have decreased to below 65 nanometers, the cost of these mask sets has become an overriding factor for small-lot fabrication of only a few wafers," said Joseph Mangano, DARPA program manager. "By eliminating expensive mask sets, the Nanowriter tool will provide the cost benefits of large-scale IC manufacturing in quantities of one wafer."

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